Yeong-Gu Cho

Experience

• 

  Thinkware Systems Corporation

  Dec 2003 - Oct 2010

  Develop automated server for path quality and map quality verification[Problem definition]Research geometric pattern matching algorithm that matches paths and maps for automating path quality verification. Building a route quality automation system server based on this research and using it as a route quality-related collaboration tool in various departments.[Technics]Research Frechet distance based geometric pattern matching algorithm.Research and development of quadtree-based network selection technology to improve pattern matching performance.[Roles]Responsible for researching geometric pattern matching algorithm.Develop and design automated route verification framework.[Result]It was able to maintain the No. 1 route quality in Korea, and it is still being used 10 years later. Show less Public transportation pathfinding framework and server development[Problem definition]Based on algorithm research related to public transportation pathfinding, develop map converter and pathfinding algorithm for public transportation pathfinding framework. Development of a realistic pathfinding framework considering walking + transfer + public transportation. Public transportation route search server development.[Technics]Research heterogeneous path merging technology for realistic pathfinding of public transportation.Research double expansion technology in pathfinding expansion algorithm.Develop scalable and robust servers for public transportation pathfinding framework.[Roles]Responsible for pathfinding framework for public transportation system.Responsible for route quality management.Develop s/w architecture and design for overall pathfinding framework.[Result]Service public transportation framework to web based service. Show less Responsible for pathfinding framework in car navigation software[Problem definition]Dedicated to pathfinding engine in Korea's No. 1 car navigation system, iNavi,. Define map format for pathfinding and develop map generator. Research pathfinding algorithm and develop pathfinding framework and service accordingly. Various research and management to improve route quality.[Technics]A* + bi-directional search algorithm extension and cutting technology.Multi target route expansion technology research and development of partial route search algorithm based on that technology.Develop hierarchical Path-Finding algorithm by researching dynamic expansion technology.Framework generalization through unit strategy design based on C++ template metaprogramming.[Roles]Responsible for pathfinding framework in domestic navigation system.Responsible for route quality management.Develop s/w architecture and design for overall pathfinding framework.[Result]Service advanced and robust pathfinding framework in car navigation system. Show less

  • Software Development Engineer | Team Manager

    Oct 2009 - Oct 2010

  • Software Development Engineer | Team Manager

    Oct 2008 - Oct 2009

  • Software Development Engineer

    Dec 2003 - Sept 2009
• 

  Samsung Electronics

  Apr 2011 - Sept 2017

  IoT service and Tizen OS based Samsung Connected Car[Problem definition]Collecting in-vehicle data with OBD protocol and providing services to connected devices, or providing cloud-based vehicle data analysis service.[Technics]Developing firmware for data collecting device in OBD protocol.Developing IoT platform based on Tizen OS and linux platform services.Developing message based system to collect data, upload to cloud server and analyzing data.[Roles]In this project, I was in charge of various important roles.Technical leader / Software architect / Main code reviewer.Main architect and technical leader for Samsung connected car serviceTF leader for IoT framework development and Geofence service development[Result]Samsung Connected Car service and product release. Show less Development of chrome book for education based on ARM architecture and chrome OS[Problem definition]System software development for ARM-based chrome OS board bring-up.Develop device driver for various peripheral devices.Porting of Chrome OS and linux platform services.[Technics]Firmware and system software for boot loader of board bring-up.Develop device driver using schematic and device specification.Linux kernel and linus platform service analytics.[Roles]System software engineer (Linux kernel, device driver)Chrome OS platform software development[Result]Release Chrome book for education. Show less

  • Staff Software Engineer | Technical Leader [삼성전자 무선사업부]

    Apr 2014 - Sept 2017

  • Software Engineer [삼성전자 무선사업부]

    Apr 2011 - Apr 2014
• 

  Samsung Electronics

  Nov 2017 - now

  Machine Learning-based semiconductor quality index prediction[Problem definition]Development of a model to predict the quality index according to the EDS results of DRAM products. The purpose of EDS testing is to predict product quality and discover the causative factors of low-quality products.[Technics]Feature selection to reduce high dimensional feature space by deep learning.Regression model for tabular, image and signal data.Data imputation modeling by generative and matrix factorization model.[Roles]Machine Learning Researcher - Data collection and analysis, feature engineering, modeling based on deep learning.S/W Architect and Engineer - End-to-end machine learning framework architecture and design and implementation.[Result]Achieve goals and deploy models to DRAM quality prediction process. Show less Improvement of semiconductor Photo Overlay process performance based on Machine Learning[Problem definition]In the photo process of patterning DRAM or VNAND circuits on wafers, it reduces misalignment that occurs when patterning multiple layers. Modeling for the minimization of errors based on the physics of the equipment.[Technics]Embedding for equipment characteristic and combination optimization based on regression model.Continual learning and adaptive learning for fast learning.Uncertainty estimation for Photo Overlay process stability.[Roles]Machine Learning Researcher - Data collection and analysis, feature engineering, modeling based on deep learning.S/W Architect and Engineer - End-to-end machine learning framework architecture and design and implementation.[Result]Achieve goals and deploy models to DRAM and Foundry photo processes. Show less Graph Convolutional Network Model-based Circuit Design Verification Automation[Problem definition]Developing models to improve circuit verification accuracy when designing DRAM circuits. When designing a DRAM circuit in stages, we recommend the circuit part with a high probability of causing problems at each stage.[Technics]Convert and featurize DRAM circuit to graph.Graph representation learning based on graph classification.Enhance graph learning by sparse network, self-attention and graph structure pooling.[Roles]Machine Learning Researcher - Data collection and analysis, feature engineering, modeling based on deep learning.S/W Architect and Engineer - End-to-end machine learning framework architecture and design and implementation.[Result]Achieve goals and deploy models to DRAM circuit verification stage. Show less Reinforcement learning based Amplifier analog circuit design[Problem definition]It is a task for designing a transistor-based amplifier analog circuit, and the purpose is to design a circuit that maximizes the output signal while reducing the size of the circuit. Reinforcement learning formulation by looking at the circuit simulation(state), changing the transistor(action) to improve performance(reward).[Technics]Reinforcement learning (Deep-Q, Policy gradient, Actor-critic).Sequence modeling by LSTM to learn the sequential effects of transistors.[Roles]Machine Learning Researcher - Data collection and analysis, feature engineering, modeling based on deep learning.S/W Architect and Engineer - End-to-end machine learning framework architecture and design and implementation.[Result]Achieve goals for 2-stage and 3-stage analog amplifier. Show less Semiconductor wafer defect pattern suspected facility tracking by Machine Learning[Problem definition]Semiconductor wafers go through various processes, and specific defect patterns appear depending on the state of the equipment. When a defect pattern appears in the wafer image taken by wafer inspection equipment, developing model to track the facility that caused the pattern.[Technics]SVM model using HOG transform(location invariant) and Radon transform(rotation invariant) feature engineering.Image model in deep learning to recognize defect pattern.[Roles]Machine Learning Researcher - Data collection and analysis, feature engineering, modeling based on deep learning.S/W Architect and Engineer - End-to-end machine learning framework architecture and design and implementation.[Result]Achieve goals and deploy model to semiconductor inspection process. Show less

  • Principal Machine Learning Researcher [삼성전자 종합기술원]

    Apr 2021 - now

  • Staff Machine Learning Researcher [삼성전자 종합기술원]

    Jun 2020 - Apr 2021

  • Staff Machine Learning Researcher [삼성전자 종합기술원]

    Feb 2019 - Jun 2020

  • Staff Machine Learning Researcher [삼성전자 종합기술원]

    Mar 2018 - Feb 2019

  • Staff Machine Learning Researcher [삼성전자 종합기술원]

    Nov 2017 - Nov 2018