Michael Johnson

Experience

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  Motorola Solutions

  Jan 2002 - Mar 2005

  Staff Design Engineer - Broadband Digital Media Group

  VLSI / ASIC Hardware Design & Verification: Designed to specification various Advanced Encryption Standard cryptographic engines for video transport layer, copy protection, and smart card applications.

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  Comcast Cable

  Apr 2005 - Dec 2017

  Senior VLSI Development Engineer - CCAD, LLC (JV)

  ➤ Embedded Software: Constructed System Integration & Test (SI&T) embedded SW platform using Broadcom Atlas application for cable television access control implementation - Developed C++ code for collecting in-band Entitlement Control Message (ECM) Data while completing initial platform 1 month (20%) earlier, resulting in library module LIBDMC product code 30% sooner - Designed ECM Data code using Object-Oriented Programming (OOP) as required for LIBDMC integration, substantially increasing product functionality confidence level before customer hand-off➤ FPGA Hardware Design: Designed Gladman tables-based Advanced Encryption Standard (AES) cryptographic engine in Verilog RTL for Control Word Generator (CWG) and Entitlement Control Message Generator (ECMG) FPGA projects - Engineered Differential Power Analysis (DPA) prevention techniques for CWG, resulting in DDM patent - Incorporated aspects of DDM patent technology into SASEBO® board FPGA design for DPA attack analysis, increasing from 0% to 25% un-extracted key bytes with 10-fold increase in samples required➤ FPGA Verification: Developed ARM® Advanced Extensible Interface (AXI) Stream Interface Bus Functional Model (BFM) for Hardware Security Module (HSM) devices - Projects included Video Decryption-Edge Module (VDEM) and Transport Encryption Card (TEC) embedded systems, achieving verified Verilog code 20% earlier on both programs - Created VCS test plan, environment, and regression suite for PCIe-based expansion cards - Increased functional group coverage from 62.2% to 99.8% from phase 1 to program completion, serving as VMM Verification Lead/Engineer for TEC video encryption proof-of-concept projects➤ ASIC Field Failure Analysis: Resolved through root cause analysis rare video-loss latent design defect in MCPOD3 ASIC - Reduced time-to-replicate failure 90x and providing shorter resolution design cycle. - Reduced costs 90% ($1M+) by designing ECO-based solution for error vs. full-chip re-layout Show less

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  Student/Self-Employed

  Jan 2018 - now

  Blockchain Developer Student Pursuing Distributed Ledger Technology Position

  After years of success in FPGA and ASIC development and verification, I am seeking to expand my cryptography background into the shared ledger arena.➤ Completed UCSD Extension MERN Full Stack Boot Camp Feb. 2019➤ Udacity Blockchain Developer Nanodegree Expected Completion Nov. 2019➤ Executing career change from hardware design (Verilog RTL) to Web Application Developer