Andrew Ho, MBA,PMP Pending

Andrew Ho, MBA,PMP Pending

Summer Intern

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  • Timeline

  • About me

    Technical Program Manager|Product Manager|Technical Marketing|Technical Enabling|Strategic Sourcing

  • Education

    • University of California, Berkeley

      -
      Bachelor of Science (BS) Mechanical Engineering
    • University of California, Irvine - The Paul Merage School of Business

      -
      Master of Business Administration (MBA) Finance, Marketing
  • Experience

    • Boeing

      Jun 1989 - Aug 1989
      Summer Intern

      Investigation of a flexible assembly manufacturing cell

    • General Dynamics

      Jun 1990 - Nov 1991
      Reliability Engineer|Supplier Quality|Supplier Management

      Analysis/reporting of component level testing data for the Tomahawk Cruise Missile Program Office. Conducted the proper maintenance of the Supplier Failure Reporting and Corrective Action System (FRACAS), wrote the monthly/quarterly Product Assurance Status Report, screened engineering designs, coordinated the efforts of vendors and subcontractors on various reliability issues, and analyzed failure data and fleet impact. Additional duties included the reliability assessment of the Cruise Missile System based on Flight Test Data using the OSD Model. Show less

    • Intel Corporation

      Jan 1994 - Jan 2017

      Enable timely integration, ramp & sustaining for all DEG processor/chipset/memory technologies for UP/DP/MP platforms. Understand customers’ capabilities & be their factory voice/advocate. Develop/deliver thermal/mechanical collaterals to enable customer applications. Influence/train in internal, NDA, & industrial enabling events.• Conceptualized and implemented the overall Xeon® platform memory thermal/mechanical enabling strategy and OxM support model that ensure time-to-market for the entire >$55 billion/year server industry.• Successfully technical program managed the entire Intel Server Processor Power Thermal Utility Software development, distribution and customer-support model. The entire >$55 billion/year server industry cannot complete its system level thermal validation without this tool from Intel.• Successfully kept numerous OxMs’ server development programs on-track through deep understanding of the relationship between Intel collateral contents/timelines versus OxMs’ product life cycle needs.• Developed both DIMM and Chipset TDP Calculation Collaterals that saves >$20 millions in BOM cost (over-design prevention) and increases design-win feasibility for the entire server industry as well as other additional TCO savings for both the end-users & the data-centers. Show less Collateral development, reference thermal/mechanical solutions technical program management and OxM technical support.• Conceptualized and implemented the overall Xeon® platform chipset thermal/mechanical enabling strategy and OxM support model that ensure time-to-market for the entire >$55 billion/year server industry.• Ratified special configuration chipset TDP resulting in >$1million BOM saving for my customers.• Ensured Intel’s reference chipset thermal mechanical solution development effort’s direction and schedule are of maximum benefits to the OxMs. This enabling effort resulted in minimal customer engineering modification cost and minimal customer system BOM cost possible. Show less

      • Sr Data Center Platform Applications Engineer|Technical Program Manager|Product Manager|Enabling

        Jan 2003 - Jan 2017
      • Technical Marketing Engineer|Technical Program Manager|Product Manager|Enabling

        Jan 2000 - Jan 2003
      • Commodity Specialist|Strategic Sourcing|Supplier Quality|Supplier Mgmt

        Jan 1997 - Jan 2000
      • Materials Engineer|Strategic Sourcing|Supplier Quality

        Jan 1994 - Jan 1997
    • Supermicro

      Jan 2017 - now
      Product Manager
  • Licenses & Certifications

  • Honors & Awards

    • Awarded to Andrew Ho, MBA,PMP Pending
      Intel® Division Recognition Award Cloud Platforms Group Jun 2016 Server Chipset TDP Calculator that reduces Xeon® Platform BOM cost and increases implementation feasibility in thermally challenging server form-factors.
    • Awarded to Andrew Ho, MBA,PMP Pending
      Intel® Division Recognition Award Data Center Platform Applications Engineering Apr 2014 Implemented a Special Silicon Sample-Free Approach to Xeon® Processor TDP Power Virus/Utility Testing
    • Awarded to Andrew Ho, MBA,PMP Pending
      Intel® Division Recognition Award Server Platforms Group Marketing Oct 2008 Prevented Intel® Memory Buffer’s TDP from becoming a Design-Win Roadblock for one Xeon® OEM
    • Awarded to Andrew Ho, MBA,PMP Pending
      Intel® Division Recognition Award Server Platforms Group Marketing Jul 2007 OEM Deep-dive Training on Xeon® Memory Subsystem Thermal Management
    • Awarded to Andrew Ho, MBA,PMP Pending
      Intel® Division Recognition Award Server Platforms Group Marketing Apr 2006 Industrial Thermal/Mechanical Enabling of the Fully Buffered DIMM