Robert Weatherford

Experience

• 

  Starkey Labs

  Sept 1996 - Jul 2006

  Digital Design Engineer

  - Lead digital designer for several mixed signal ASICs and test chips using Verilog and SystemC, to provide various master and slave serial communications interfaces, using a SSI, SPI, PCM and custom protocols, between mixed signal CODECs and other circuits or hardware systems.- Gained valuable experience implementing various DSP and wireless support functions including a (15, 11) Reed Solomon decoder/encoder, CRC checkers, output compression limiters, wave digital filters, IIR filters, and other support functions.- Worked with a mixed signal team to implement various digital modules to support analog signal processing. These included ADCs, successive approximation routines, sine wave generators, and frequency dividers, for a state of the art mixed signal CODEC.- Created PCB development boards to verify designs on FPGAs.- Used Labview to provide automated bench level testing of completed ASICs. Show less

• 

  ON Semiconductor

  Jul 2006 - Mar 2010

  - Successfully oversaw the design, verification, synthesis, LEC, ATPG, IDDQ, STA, and test pattern generation, for a mixed signal ECG ASIC, that required minimum changes suggested by the customer.- Worked with analog engineers to provide digital support blocks for analog circuits including lead fault, respiration, and pace pulse detection blocks.- Designed, implemented and verified, in Verilog, VHDL, and System Verilog, master and slave serial communications interfaces, using a SPI and PCM protocols for several devices, overcoming strict timing constraints. These peripheral interfaces were part of an ARM based system using the AHB lite bus for control.- Designed in Verilog a pulse width modulator for supporting signal pole double throw switches, a CRC encode/decode circuit, and support circuitry for setting up external pins for qualification testing.- Gained experience as the lead verification engineer providing analog behavior models using SystemC for system level verification. Show less

  • Staff Design Engineer

    Mar 2008 - Mar 2010

  • Digital Design Engineer

    Jul 2006 - Mar 2008
• 

  Electric Propulsion Laboratory, Inc

  Jun 2010 - now

  Prin. Systems Engineer and Information Systems Security

  Aerospace R&D. Digital design - Microsemi (ACTEL) FPGA programming for control systems Embedded programming - PIC18, PIC24 , 8051, LEON V8 for control systems. Payload command and data handling. Data acquisition - Labwindows CVI, PXI, cDAQ Information system security - CISSP since October 31, 2015