Salar wang

Salar wang

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location of Salar wangShanghai, China
Phone number of Salar wang+91 xxxx xxxxx
Followers of Salar wang55 followers
  • Timeline

    Nov 2007 - Oct 2011

    EE (Hardware Engineer)

    广达电脑
    Nov 2011 - Jul 2015

    Quality EE FA

    HP
    Dec 2015 - May 2017

    HVPM

    Wingtech Technology Co.Ltd.
    Current Company
    Jun 2017 - May 2021

    System Engineer

    ST Electronics
  • About me

    HP - Reliability Engineer

  • Education

    • 中国南阳理工学院

      2002 - 2006
      本科 电子信息工程
    • 南阳理工学院

      2002 - 2006
      Bachelor's degree electronic information engineering a

      Activities and Societies: 电子与电气工程协会

    • 桂林理工大学

      2019 - 2021
      研究生 mba
  • Experience

    • 广达电脑

      Nov 2007 - Oct 2011
      Ee (hardware engineer)

      Responsibility Statement:• Complete product hardware development and design, component selection, schematic diagram, PCB design guidance and BOM preparation according to the complete machine scheme.• Assist the production line to solve the electronic hardware problems encountered in the NPI stage, such as the mainboard patch and the complete machine assembly• Ensure electronic measurements, EMI, system design meet product requirements and development schedules• Responsible for hardware testing and debugging at each stage• Work with other engineers in various departments to ensure overall hardware design targets are achieved on time and meet reliability/conformance requirementAccomplishments:• The hardware development and design of ACER ZR6(Intel Montevina Platform) and solving the problem of random downtime• Hardware development and design of ACER model ZQ2 (AMD Danube Platform) and ESD problem of its extension model• Run-in error warning for Dell Krug HR(Intel Huron River Platform) motherboard hardware development due to Atmel Chipset inter bit problems in the trial production phase• The most economical anti-EMI solution to solve the problem of the Krug extension when the production line is loaded with the SD Card. Show less

    • Hp

      Nov 2011 - Jul 2015
      Quality ee fa

      Responsibility Statement:• Responsible for analyzing the failure of personal products desktops, laptops and mobile products in the design, development and production process, follow up and provide reports, and make improvement requirements.• Manage HP and other brand hardware comparative test analysis based on market definition and identify improvement opportunities• Perform failure analysis of products with modern failure analysis tools, to isolate and identify the failure mechanisms and the root causes.• To work closely with Process Engineers, Development Engineers and Reliability Engineers to improve products yield and reliability.Accomplishments:• Customized regional reliability test solution for special power supply environments in India, such as high temperature, high humidity, poor power grid, and heavy dust.• Conducted effective analysis on the failure of laptop power chips returned by end customers in the market, and proposed to increase the power cycle test in the reliability test to improve the power design and detection capability of the product.• Completed the 1C and 2C customer experience test projects of consumer mobile products in 2015, cooperated with RD in the field of battery and wireless, put forward improvement suggestions and opinions, and improved customer satisfaction of products. Show less

    • Wingtech technology co.ltd.

      Dec 2015 - May 2017
      Hvpm

      Hardware verify project managementResponsibility Statement:• Responsible for project sales and customer files hardware and reliability test.• The basic test plan for each stage schedule and implementation and acceptance for the project.• Be responsible for mobile Baseband, RF performance test and issue location, tracking and fix.Accomplishments:• ASUS and ACER product hardware test and reliability test plan draft• LG product customer specification and evaluation index of the early stage• China Mobile product evaluation BB and RF critical issues during the development stage. Fixed issues with R&D department. Improved and perfected test method and standards. Show less

    • St electronics

      Jun 2017 - May 2021
      System engineer

      Responsibility Statement:• Design and selection of hardware, functional design and principle design of subway passenger information system equipment.• Using Visio, Axure, CAD and other products to design logic diagrams, schematics and prototypes.• Design a set of maintenance equipment to repair the PIS equipment up to the chipset level of the PCBA board• Responsible for design documentation, test planning, execution and problem tracking of all phases of the PIS system, project acceptance and risk assessment.Accomplishments:• Hardware design, principle design and function design of PIS system equipment in New York project.• Hardware design of PIS system supporting maintenance equipment and hardware maintenance scheme of each board card for BART project in San Francisco, USA.• Integrated design of PIS system hardware and software for LRT3 project in Malaysia and product acceptance in FAI phase. Show less

  • Licenses & Certifications

    • Pmp certification

      Project management institute
      Mar 2013