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Ara Mkrtchyan

Ara Mkrtchyan

Technical Department Intern (Site Maintenance Unit)

Followers of Ara Mkrtchyan188 followers
location of Ara MkrtchyanYerevan, Yerevan, Armenia

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  • Timeline

  • About me

    Android Developer | Tech Lead, Analog/Mixed Signal Layout Design | Flow Development and Automation 🎸

  • Education

    • Armenian - Indian Center for Excellence

      2017 - 2017
      Java/Android Developer

    • Microsoft Innovation Center

      2017 - 2017
      C#

    • Yerevan State University

      2009 - 2013
      Bachelor's degree Radiophysics and electronics/VLSI Design

    • Yerevan State University

      2013 - 2015
      Master's degree Physical Sciences/VLSI Design

  • Experience

    • VivaCell-MTS

      Jun 2011 - Aug 2011
      Technical Department Intern (Site Maintenance Unit)

      Investigation and testing of reserve current maintenance generators.Investigation of cable connectivity issues and solutions.Battery carrier metal tables' construction and battery connectivity implementation.

    • VivaCell-MTS

      Jun 2012 - Aug 2012
      Technical Department Intern (Site Maintenance Unit)

      Rectifier system to distribution board system load change implementation.Distribution board to Base Station Controller connectivity implementation.Battery testing.

    • VivaCell-MTS

      Jun 2013 - Aug 2013
      IT Department Intern

      Computers' operating system change implementation.

    • Synopsys Armenia CJSC

      Jan 2014 - now

      Analog and Mixed Signal layout design of NVM MTP and OTP IPs for multiple silicon manufacturing foundries, such as TSMC, Maxim Integrated, IBM, SMIC, UMC, GlobalFounrdies, ams AG, using Synopsys's Galaxy Custom Designer, Custom Compiler tools. Analog and Mixed Signal physical design (layout) of NVM (Non-Volatile Memory) devices and circuits for multiple silicon manufacturing foundries using Synopsys's Galaxy Custom Designer, Custom Compiler tools.Physical design of logic gates using Synopsys's Galaxy Custom Designer, Custom Compiler tools.Experience and knowledge of main principles of AEON design with different architecture.Physical verification (DRC/LVS/ANT) based on customer focused constraints. Physical design of logic gate libraries using Synopsys's Galaxy Custom Designer, Custom Compiler toolsDevelopment of DRC/LVS runsets for Synopsys's Hercules and IC Validator Physical Verification Systems.

      • Tech Lead, Analog/Mixed Signal Layout Design, R&D, Staff

        Jan 2024 - now

      • Tech Lead, Tape-out Engineer, Senior Analog/Mixed Signal Layout Design Artist

        May 2020 - Jan 2024

      • Tech Lead, Tape-out Engineer, Mid Analog/Mixed Signal Layout Design Engineer

        May 2018 - May 2020

      • Junior Analog/Mixed Signal Layout Design Engineer

        Apr 2015 - May 2018

      • Intern

        Jan 2014 - Apr 2015

    • State Engineering University of Armenia

      Sept 2016 - May 2018
      Mentor

      Mentoring students' graduaton qualification works.

    • Фриланс

      Jan 2019 - Mar 2019
      Android Flutter Developer

    • InformaticsSolution LLC

      May 2019 - Nov 2019
      Android Developer

      Development of android applications using the following languages and technologies:JavaMVVM with Clean architectureRetrofit 2Picasso, GlideDataBinding

    • Aimtech LLC

      Jan 2020 - Aug 2021
      Android Developer

      Development of android applications using the following languages and technologies:RxJava, RxAndroid, MultithreadingJavaKotlin, Coroutines, FlowsMVVM/MVI/Clean ArchitectureRetrofit 2, VolleyAndroid Jetpack Picasso, Glide, FrescoAnimationsUtility functions developmentJava to Kotlin Migration

    • Mediapark

      Jan 2022 - Jul 2022
      Android Developer

      Development of android applications using the following languages and technologies:Kotlin, Coroutines, FlowsMVVM/MVIRetrofit 2Android Jetpack Java to Kotlin MigrationVolley to Retrofit 2 Migration

  • Licenses & Certifications

    • Certificate for participation in “First Competition of Yamaha Saxophonists in Armenia”

      Yamaha
      Jan 2005

    • Certificate of Completion - Java Programming: OOP/Database/JDBC & Android Programming Trainings

      AITC / Armenian-Indian Center for Excellence in ICT by EIF
      Oct 2017

    • Certificate of Achievement in recognition of successful completion of a Master’s program with a specialization in VLSI Design, Synopsys Armenia Educational Department

      Synopsys Armenia CJSC
      Jan 2015

    • Certificate for active participation from Student Scientific Society, Yerevan State University, Department of Radiophysics

      Yerevan State University
      Jan 2010

    • Certificate of Recognition (1st Automotive design in Silterra)

      Synopsys Inc
      May 2019

    • Certificate of Recognition, "Outstanding Individual Contribution" Award, in recognition of GF40ULP tapeout

      Synopsys Inc
      Aug 2023

    • Certificate of Achievement in recognition of successful completion of a Bachelor’s program with a specialization in VLSI Design, Synopsys Armenia Educational Department

      Synopsys Armenia CJSC
      Jan 2013