Suvojit Ghosh

Experience

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  Amazon

  Jun 2017 - Mar 2018

  ML Data Associate
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  Intel Corporation

  Sept 2022 - May 2023

  Pre Silicon Validation Intern

  1. Worked for SoC Pre-Silicon verification for the latest generation of cutting-edge Xeon Server processors, employing industry-standard methodologies UVM & SystemVerilog.2. Collaborated with cross-functional teams to define comprehensive verification strategies, goals, and scope for intricate SoC projects.3. Designed and developed robust verification environments, ensuring functional correctness, performance, and compliance with specifications.4. Executed verification plans for digital designs, incorporating advanced techniques such as constrained random testing, coverage-driven verification, and assertion-based verification to achieve comprehensive coverage metrics.5. Implemented Toggle coverage analysis for SoC signals, ensuring thorough testing and identifying areas for improvement.6. Spearheaded the creation and maintenance of a regression testing infrastructure (Venus Granite Tool), resulting in enhanced efficiency and design reliability.7. Conducted thorough debug analysis, working closely with design teams to resolve issues and ensure design correctness using Synopsys Verdi (waveform view) and post-regression reports.8. Assisted the verification team in test planning, testbench development, and simulation activities, collaborating seamlessly with the RTL team for effective implementation of validation plan changes.9. Contributed significantly to the development of verification documentation, ensuring clear communication of strategies and results.10. Actively pursued professional development, staying current with industry trends in SoC verification through attendance at conferences and continuous learning initiatives. Show less

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  ChipEx Technologies

  Oct 2023 - Jul 2024

  Design Verification Engineer

  1. Led and directed the Design Verification team, successfully implementing functional verification for MIPI D-PHY.2. Orchestrated the development and execution of comprehensive test plans for ongoing project designs.3. Engineered Universal Verification Components (UVCs) from inception, employing advanced verification methodologies (UVM and SystemVerilog) to ensure the functionality and reliability of intricate digital circuits.4. Applied SystemVerilog Assertions (SVA) to meet rigorous design checks, contributing to project success.5. Accomplished 100% coverage in functional, FSM, Toggle, and Assertion metrics, showcasing meticulous project completion.6. Leveraged Python scripting to automate UVM testbench environments, enhancing efficiency in verification processes.7. Collaborated seamlessly with design teams, pinpointing and resolving design issues to guarantee error-free chip designs and on-time project deliveries.8. Utilized industry-standard EDA tools and simulators for digital design simulation and verification, actively contributing to product performance validation and improvement.9. Played a pivotal role in cross-functional teams, enhancing verification processes, ensuring product reliability, and providing mentorship to junior engineers in verification methodologies and best practices. Show less

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  Synopsys Inc

  Aug 2024 - now

  ASIC Digital Design, Sr Engineer

  Inter-operability verification of an IP (MIPI Unipro v2.0 + MIPI MPHY v5.0)- IP Integration- Support customer to bringup interoperability in their SoC.- Regression TestingCurrently working on integration of UniPro V2.0 and MPHY V6