Muhammad Akmal A.

Experience

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  Multitest

  Sept 2012 - Jan 2016

  PCB Designer

  - Layout design of ATE PCB Loadboard: - for platforms Advantest CMT, Teradyne uFlex and iFlex - with BGA up to 6000 pins - with up to 42 layers- Schematic capture as per customer requirements using Cadence HDL or OrCAD- Creations of in-house fabrication documents

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  Harbor Electronics

  May 2016 - Jan 2016

  PCB Designer

  Layout design of ATE PCB Loadboard: - for platforms Advantest CMT, Teradyne uFlex and iFlex - with BGA up to 6000 pins - with up to 42 layers- Schematic capture as per customer requirements using Cadence HDL or OrCAD- Creations of in-house fabrication documents

• 

  Intel Corporation

  Jan 2017 - Mar 2021

  Package R&D Engineer

  - FPGA package substrate layout design- Package layout on Multi-die flip chip BGA and WLCSP- Package layout for high speed up to 112G, ADC/DAC, LVDS, and DDR- Package layout optimization for SIPI performance- Manufacturing and assembly documentations- Pathfinding for bump map and ballmap pattern for future products- Package design rule documentation

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  Efinix, Inc.

  Mar 2021 - now

  MTS, Package Design Engineer

  - OSAT communication for design rule and manufacturing release- FPGA package substrate layout design using Cadence APD- Package layout on Wirebond, FCCSP, FCBGA and WLCSP- Package layout for high speed, LVDS, MIPI, LPDDR4, PCIE4- Package layout SIPI validation and optimization using XtractIM, PowerSI, TopXp, Clarity3D- Manufacturing and assembly documentations- Pathfinding for bump map and ballmap pattern for future products- PCB design flow owner- Pinout automation owner- Pinout owner Mostrar menos