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Abhijeet Pendharkar

Abhijeet Pendharkar

Teaching Assistant

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  • Timeline

  • About me

    Senior DV Engineer

  • Education

    • Vishwakarma Institute Of Technology

      2011 - 2015
      B.Tech Electronics and Telecommunication

    • Indraprastha Institute of Information Technology, Delhi

      2017 - 2019
      Master of Technology - MTech ECE (VLSI)

  • Experience

    • Indraprastha Institute of Information Technology, Delhi

      Aug 2017 - Dec 2018
      Teaching Assistant

    • KPIT

      Apr 2019 - Nov 2020

      • Test Engineer

        Aug 2019 - Nov 2020

      • Intern

        Apr 2019 - Jul 2019

    • Qualcomm

      Jan 2021 - now

      Design Verification of security IPs in UVM environment. Familiar to System Verilog, AHB, APB protocols, coverage closure, Power aware simulations, CDC, formal setups for FPV, FRV, bus certification. Decent experience in test planning, debugging for functional verification of security IPs Design Verification in UVM for security IPs

      • Senior Engineer

        Dec 2023 - now

      • Engineer

        Jan 2021 - Nov 2023

  • Licenses & Certifications

    • Certified Tester Foundation Level (CTFL)

      ISTQB® - International Software Testing Qualifications Board
      Mar 2020