Karthikeyan P

Experience

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  Acmegrade

  May 2022 - Jul 2022

  Summer Intern

  ♦Training on all the required theory for IoT and skills needed to embed physical objects with sensors, processing ability, software, and other technologies that connect and exchange data with other devices.

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  Maven Silicon

  May 2023 - Jul 2023

  Project Intern

  ♦ AHB2APB bridge design using Verilog HDL- RTL designed and developed a cutting-edge hardware module that serves as an intermediary between the Advanced High-performance Bus (AHB) and the Advanced Peripheral Bus (APB).♦ RISC-V RV32I RTL Design using Verilog HDL-RTL designing and implementing a powerful 32-bit RISC-V processor core adhering to the RV32I base integer instruction set architecture.

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  Electronics Corporation of India Limited (ECIL)

  Jun 2023 - Jul 2023

  Project Intern

  ♦ Completed the project "AES Encrypted Client-Server Communication" using TCP/IP protocol and socket programming in QT software for embedded Systems applications.♦ Monitored the process of PCB manufacture and worked on Circuit design, RTL design and Simulation.♦ Performed analysis and tests on different radio's designed in the Communication & Systems Group of Electronics Corporation of India Limited –HF Transceiver, Digital V/UHF radio & V/UHF Transceiver .

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  Maven Silicon

  Oct 2024 - now

  Physical Design and Verification Trainee

  Hands-on experience and expertise in the physical design and verification part of RTL-to-GDSII flow. Key expertise areas: Floor-planning, Placement & Routing, Clock Tree Synthesis (CTS), Static Timing Analysis (STA) & Timing closure. Also competent in TCL, DFT, LVS, DRC and ECO. Tools- Synopsys Design Compiler, Primetime, IC Compiler II, Fusion compiler, Siemens Calibre