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Hemalatha M R

Hemalatha M R

Analog Physical Design Engineer

Followers of Hemalatha M R2000 followers
location of Hemalatha M RBengaluru, Karnataka, India

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  • Timeline

  • About me

    Analog Layout Design Engineer at Signalchip Innovations Private Limited

  • Education

    • Presidency PU College

      2016 - 2018
      PUC PCMB

    • St Anne's School

      2015 - 2016
      SSLC

    • Nitte Meenakshi Institute of Technology

      2018 - 2022
      Bachelor of Engineering - BE Electrical, Electronics and Communications Engineering

  • Experience

    • Signalchip

      Sept 2022 - now
      Analog Physical Design Engineer

      My expertise includes precision analog layout, floorplanning, and routing, with a keen focus on optimizing for power, area, and performance. 1. Taped out 4G chip in 2022.2. Taped out GNSS NavIC chip in october 2023

  • Licenses & Certifications

    • Introduction to Embedded System Design

      Coursera

    • Introduction to Artificial Intelligence

      NPTEL

    • Enguru certificate of completion

      Enguru Live English Learning App

  • Volunteer Experience

    • Volunteer

      Issued by Katalyst India on Jan 2018
      Katalyst IndiaAssociated with Hemalatha M R

    • Volunteer at College Fest

      Issued by Nitte Meenakshi Institute of Technology on Jan 2018
      Nitte Meenakshi Institute of TechnologyAssociated with Hemalatha M R

    • Presenter - Semicon India (2023)

      Issued by Signalchip on Jul 2023
      SignalchipAssociated with Hemalatha M R

    • Presenter - G20 Summit (2023)

      Issued by Signalchip on Aug 2023
      SignalchipAssociated with Hemalatha M R

    • Exhibitor - Bharat Telecomm (2025)

      Issued by Signalchip on May 2025
      SignalchipAssociated with Hemalatha M R