Simon Danielraj Stephen

Simon Danielraj Stephen

Programmer Analyst Trainee

Followers of Simon Danielraj Stephen5000 followers
location of Simon Danielraj StephenAustin, Texas, United States

Connect with Simon Danielraj Stephen to Send Message

Connect

Connect with Simon Danielraj Stephen to Send Message

Connect
  • Timeline

  • About me

    Silicon Design Engineer 2 at AMD | Qualcomm | MS in ECE (VLSI) at University of Minnesota, Twin Cities.

  • Education

    • ST. JOSEPH'S INSTITUTE OF TECHNOLOGY, OMR

      2017 - 2021
      Bachelor of Engineering - BE Electronics and communication engineering
    • University of Minnesota

      2022 - 2024
      Master of Science - MS Electrical and Computer Engineering

      • VLSI Design I (7nm FINFET, Device Characteristics, Timing, and Power analysis),• VLSI Design Automation II (CAD, Algorithms, Placement, Routing, Floor Planning, STA, Synthesis, Technology Mapping, Verification),• VLSI Design Lab (Synthesis, Floor Planning, PnR of Custom Design, Power Optimization, RTL2GDS flow in saed 32nm PDK.)• Advanced Verification Methods (SystemVerilog, UVM)• Computer Architecture and Machine Organization (MIPS architecture, Data Hazards, Branch… Show more • VLSI Design I (7nm FINFET, Device Characteristics, Timing, and Power analysis),• VLSI Design Automation II (CAD, Algorithms, Placement, Routing, Floor Planning, STA, Synthesis, Technology Mapping, Verification),• VLSI Design Lab (Synthesis, Floor Planning, PnR of Custom Design, Power Optimization, RTL2GDS flow in saed 32nm PDK.)• Advanced Verification Methods (SystemVerilog, UVM)• Computer Architecture and Machine Organization (MIPS architecture, Data Hazards, Branch Prediction, Forwarding) Show less

  • Experience

    • Cognizant

      Jan 2021 - Jul 2022
      Programmer Analyst Trainee
    • Qualcomm

      May 2023 - Aug 2023
      Interim Engineering Intern

      • Understanding the fundamentals of Power Integrity and Power Delivery Networks• Designed a CPU Power delivery network for AI Enablement and optimized the PCB, PKG, and system technology using SIWave.• Minimized the worst-case voltage droop by optimization in CPU PDN to meet the voltage droop spec.

    • AMD

      Jul 2024 - now
      Silicon Design Engineer 2
  • Licenses & Certifications

    • Fusion Compiler : Synthesis and Design Implementation

      Synopsys Inc
      Aug 2024