Experience

• 

  Blv licht- und vakuumtechnik

  Oct 1993 - Feb 1994

  First internship
• 

  Siltronic ag

  Feb 1995 - Sept 1995

  Process optimization on the ASM single-wafer epitaxial reactor Epsilon One.Characterized defects to conduct a root cause analysis and thus to improve quality and yield.

  • Working student at the 200 mm epitaxial process engineering department

    Jul 1995 - Sept 1995

  • Second Internship

    Feb 1995 - Jul 1995
• 

  Siltronic ag

  Feb 1996 - Mar 1996

  Working student at the 200 mm epitaxial process engineering department
• 

  Siltronic ag

  Sept 1996 - Aug 1997

  Implemented software application from thesis + process optimization. Created a software suite for an automatic data logging and analysis of a Centura Epitaxy Reactor (AMAT) and its use for process optimization.

  • Project Leader

    Jun 1997 - Aug 1997

  • Diploma thesis at the 200 mm epitaxial process engineering department

    Sept 1996 - May 1997
• 

  Siltronic ag

  Oct 1997 - Aug 1999

  300 mm epitaxy process development engineer

  Managed all process-related aspects of an AMAT 300 mm epitaxial reactor.Performed three CVD tool demos at AMAT in Santa Clara, USA.Led cost-cutting projects.

• 

  Silicon genesis

  Sept 1999 - Mar 2003

  Senior epitaxy process engineer

  Head of technology and process development in the field of CVD Epitaxy.Developed and optimized epitaxial processes such as strained and relaxed SiGe layers as well as Si/SiGe heterostructures for the fabrication of Silicon-on-Insulator (SOI) wafers.Managed three installations of a 200 mm Chemical Vapor Deposition (CVD) Epitaxy reactor from the vendor Applied Materials.

• 

  Vertilas gmbh

  Apr 2003 - Sept 2003

  Production engineer front-end

  Responsible for the frontend semiconductor processing of vertical-cavity surface-emitting lasers (VCSEL).Running physical vapor deposition processes like sputtering and evaporation, lithography, dry/wet etching and electroplating.

• 

  Avancis gmbh

  Oct 2003 - Nov 2021

  I was the head of key strategic projects to develop new technology generations in the core processes of the AVANCIS technology, e.g. to form the compound Cu(In,Ga)(S,Se)2 semiconductor (RTP).Leading of cross-functional and international project teams including cooperation with well-known equipment suppliers and research institutes. I was the head of the research project CIS-Clustertool funded by the Federal Ministry of Education and Research (BMBF). The four industrial partners successfully developed new processes and innovative equipment concepts.As a process owner, I was fully responsible for several technology transfers from R&D to mass production.Coordinated and led risk assessments (HAZOP/FMEA), risk mitigation projects and cost cutting programs. Deputy of the pilot line manager.Responsible for organization, throughput and yield improvement of the R&D pilot line.Responsibility for the Cu(In,Ga)(S,Se)2 semiconductor formation process.

  • Principal Development Engineer

    Oct 2014 - Nov 2021

  • Project Leader Engineering and Equipment Development

    Aug 2007 - Sept 2014

  • Development Engineer

    Oct 2003 - Jul 2007
• 

  Infineon technologies

  Nov 2021 - now

  Project manager

  Chip Development for E-Mobility (Main Inverter)