Miquel López

Experience

• 

  HYDRASYSTEM PLUS S.L

  Oct 2017 - Feb 2018

  Enginyer

  Helping in the design of the hydraulic systemsBuilding the symbol shematic (Autocad)Designing custom hydraulic blocks (SolidWorks)Placing the components in the assembly (SolidWorks)

• 

  IDNEO

  Mar 2019 - Jul 2020

  Developing an image acquisition system embedded in Xilinx ZCU104 Ultrasclae+ MPSoC and implementing a convolutional Neuronal Network in its FPGA. FPGA and VHDL Design (Xilinx Vivado & SDK)PCB design. Schemathic and Layout (Altium)FX3 USB Video Class ThreadX RTOS based driver program. (Eclipse & GPIFII)eLab Reworks and Harness.Optical lab tasks using EZContrast XL88W, Konica Minolta CA-2000, Konica Minolta CS-2000A, Imatest, Devware.

  • Master thesis in computer Vision team

    Feb 2020 - Jul 2020

  • Internship HW enginyer in computer Vision team

    Mar 2019 - Feb 2020
• 

  IDNEO

  Sept 2020 - now

  R&D Vision Hardware Engineer

  HW leader in different projects developing vision systems such as ADAS cameras for automotive applications, Industrial cameras for safety applications and Framegrabbers. Different camera types involving 100Base-T1, GMSL2, FPD-Link III and MIPI CSI-2 as typical interfaces as well as other typical protocols such as SPI, I2C and CAN among others.Playing also a System Engineer role in that vision systems projects taking care of the whole HW, SW, Mechanical and Optical areas from requirements elicitation to industrialization.- Requirements elicitation (customer requirements analysis, compliance matrix follow-up, system requirements and HW Requirements). IBM DOORS- SYS and HW architecture definition- HW design (Component selection, load map, schematics, deratings, design review, functional safety support). Altium schematic- HW simulations. LTspice, QucsStudio, PCB impedance calculators- Layout supervision (preplacement, layout rules, stackup revision, layout revision)- Interfaces (HW-SW, HW-Mechanical, HW-Optical, Mechanical-Optical). SolidWorks- Validation test plan (SYS and HW validation plan definition, unitary testing, integration tests, functional and environmental tests, DFMEA and DV support)- HW and Video bring-up (GMSL2 protocol serializer and deserialize configuration, FPGA program with Verilog and VHDL). Eclipse, Xilinx Vivado, Lattice Diamond- Manufacturing support (design for manufacturing, PCA and GA verification guides, ICT/FCT definition, Coverage matrix, EOL definition)- Optical validation support (MTF, Blemish, relative illumination, Field of View, Hot/Death pixels, Intrinsic calibration).- SW internal tools development (USB Video Class Interface in a microcontroller with ThreadX RTOS based firmware, USB Video Software interface in host PC) VisualStudio Code and wxWidgeds framework, Eclipse, OpenCV, Python, C++, C#- Technical documentation at system level (IATF 16949 & ISO 9001 certificated process) Jira Show less