Experience

• 

  Medisist

  Aug 2012 - Apr 2013

  Software engineer

  Developing Medical applications in C language for Embedded Systems.

• 

  Freescale semiconductor

  Aug 2013 - May 2015

  Applications engineer

  • FW and HW application development.• Pre-Silicon and Silicon Validation.• Knowledge of Multicore processing.• Developed Physical Layer (4B5B, BMC, CRC) Encoding-Decoding algorithms.• Developed and implemented Transport Layer base on KSDK software.• Knowledge of virtual peripherals as FlexIO, DMA, SPI, I2C, UART.

• 

  Intel corporation

  May 2015 - now

  Debugging complex datacenter problems that involve understanding with certainty a class of failures and explore, analyze, and create solutions. Developer and debugger with focus on expanding new testing techniques to find datacenter Reliability, Availability, Serviceability (RAS) breaking points in order to optimize and improve server resiliency features and its implementations in our products. Responsible of the overall Debug of one SoC Server Products of Intel, with deep technical expertise to drive debug and set technical direction interacting with all the validation teams, Design, and SoC Architecture. Debugging Servers at a big scale, creating debug scripts to hit certain problems and situations. Analyze big data and logs to root cause possible problems and events.Strong result and customer orientation skills driving effective teamwork, communication, collaboration and commitment across multiple disparate groups both internal and external to understand business objectives and identify corresponding stakeholder needs. Show less Defect management / Debug leadAt Scale validation experience for Intel server products, Owning and Driving in parallel the At Scale Power-On of the latest Xeon Server programs "10nm and 14nm CPUs". -Creating, defining, and developing the at scale system validation environment and test plans. -Use and apply platform-level tools and techniques to ensure performance to spec. -Validation, enablement, and debugging of current and upcoming at scale cloud native technologies on server products. -Development of methodologies, execution of validation plans, and debugging of failures. -Data Analysis and debugging at Scale -Using in-band and out-of-band logs, Kibana and Grafana visualizations tools to Analyze data, report, and track silicon, hardware, firmware, etc issues. -OS – Linux (Centos, Clear Linux, ReHat, SuSE) and Windows Server -Drive HW/SW changes in cluster sites to support deployment life cycle phase transitions for platform and silicon (From NPI to Sustaining-post launch) -Support Sys debug/triage for cluster systems to detect and diagnose hardware/firmware/software health issues, with a defined analytical methodology for controlled experiments and document HSD database with system and component logs. -Strong skills in troubleshooting and continuous improvement, developing methodologies and capabilities to enable efficiency and effectiveness of execution; always willing to step forward, owning problems, and working to get the solution. Show less On this Job role I Creates, defines and develops system validation environment and test suites. Uses and applies emulation and platform-level tools and techniques to ensure performance to spec. Responsible for the development of methodologies, execution of validation plans, and debug of failures. Requires broad understanding of multiple system areas and requires interfaces with Architecture, Design, and Pre-silicon Validation teams in improving post-silicon test content and providing feedback for future on-die debug features. Show less

  • At Scale Cluster Validation Technical Lead

    Feb 2024 - now

  • At Scale Validation Engineer

    Jun 2020 - now

  • System Validation Engineer

    May 2015 - Jul 2020