Kukatlapalli Vinay Kumar

Kukatlapalli vinay kumar

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location of Kukatlapalli Vinay KumarMumbai, Maharashtra, India
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  • Timeline

  • About me

    Sr Engineer Yield Engineering (Electrical Characterization, Yield Analysis, and Fab Operations Support)

  • Education

    • International advanced research for powder metallurgy and new materials(arci), hyderabad

      2017 - 2017
      Internship material characterization and testing

      Performed Qualitative and Quantitative Analysis by Scanning Electron Microscopy to confirm the equiatomicity of individual elements of the alloy, with the help of Energy Dispersive X-Ray Spectroscopy (EDS).Determining the hardness of both individual components of alloy and alloy using Vickers Micro Hardness and Instrumented Indentation(NanoIndentation )

    • National institute of technology jamshedpur

      2014 - 2018
      Metallurgical and materials engineering 8.34

      Team Leader |Eco-Riders| NIT Jamshedpur-• Leaded Materials Department group of Team 'EcoRiders' containing 24 membersJoint Coordinator | Annual Techno-Management Fest | NIT Jamshedpur-• Coordinated a Public Relations Team at the fest, containing about 20 peopleThe Captain of the Badminton Team in the Department of Metallurgical and Materials Engineering, NIT Jamshedpur

    • Indian institute of technology, bombay

      2019 - 2021
      Master of technology - mtech metallurgical engineering and materials science(corrosion science and engineering ) 9.30

      Activities and Societies: Event Coordinator | TechConnect | TechFest, IIT Bombay • Achieved more than 50% increase in terms of footprints of exhibits with 100+ stalls • Coordinated with 500+ volunteers for the showcase of 250+ exhibits MASTER’S THESISStudying the Variation of Temperature Coefficient of Resistance of Aluminum Induced Crystalline Silicon for Sensor Applications Approach:• To work with deposition techniques like HWCVD, Thermal PVD for fabrication over Silicon Wafer, Kapton, and Glass Substrates.• Optimizing different Process Parameters related to the Metal Induced Crystallization and Design of Experiments• Finally various characterization techniques (Electrical, Compositional & Structural)… Show more MASTER’S THESISStudying the Variation of Temperature Coefficient of Resistance of Aluminum Induced Crystalline Silicon for Sensor Applications Approach:• To work with deposition techniques like HWCVD, Thermal PVD for fabrication over Silicon Wafer, Kapton, and Glass Substrates.• Optimizing different Process Parameters related to the Metal Induced Crystallization and Design of Experiments• Finally various characterization techniques (Electrical, Compositional & Structural) were used to study the effect of different process parameters. Impact:• In this work, the temperature dependence of AIC-Si is studied and understood via different characterization methods. • Nonlinearity in the output signal due to temperature dependence can be significantly reduced by employing AIC-Si with optimum TCR value. Show less

  • Experience

    • Jsw steel

      Feb 2019 - Jul 2019
      Graduate engineering trainee

      • Worked as Graduate Engineer Trainee in JSW Steel Limited, Bellary Karnataka. Lead a team of Operations in SMS-III. • Process diagnosis and process monitoring on collaborating with other engineering groups.• Analyzing the process parameters and process conditions to increase the yield of the product and overall productivity.• Coordinating with all the subunits with in SMS-III department and ensure them to be inline with the planned process route.

    • Globalfoundries

      Jul 2021 - now
      Sr engineer yield engineering

      • Part of the Electrical Characterization Team implementing yield enhancement strategies by analyzing electrical parameters and inline metrology data in the Production Line of Advanced FinFET Technology Fab, Malta USA.• Analyzing Electrical parameters/Inlines Metrology data through SPC methods &yield/ test data analysis of 14nm FinFETs manufacturing for yield improvement.• Used statistical data analysis to investigate Electrical test failures & find the root cause for wafers scraped and documented as a reference for future process improvement to maximize the yield.• Executing Electrical Data Analysis for Process Change Review Boards& Tool Qualifications• Teamed with Process modules(Etching, CMP, PVD/CVD) to detect Inlines/Process Parameters drift/shift and provide risk assessment proposals.• Executing technical elements of training as a part of knowledge sharing. Show less

  • Licenses & Certifications

    • Programming for everybody

      University of michigan and offered through coursera
      Jan 2021
    • Machine learning

      Stanford university and offered through coursera
      Jan 2020
  • Honors & Awards

    • Awarded to Kukatlapalli Vinay Kumar
      GFES Over All Choice Award Technology Symposium at GlobalFoundries Bangalore, 2024 feb 2024 Reduction of scrap rate by addressing a CVD tool issue causing FBEOL metal/via-chain short fails.
    • Awarded to Kukatlapalli Vinay Kumar
      Critic Poster Award and Popular Poster Award 5th Banglore Technology Symposium at GLOBAL FAB ENG SERVICES Banglore ago 2022 Our poster on the topic Macro Migration for improved APC feedback to reduce Electrical Fails was selected for both Critic Poster Award and Popular Poster Award.
    • Awarded to Kukatlapalli Vinay Kumar
      DR. DARA P. ANTIA MEMORIAL METAL QUIZ Society For Metallurgical Engineering Students, NIT Jamshedpur in association with IIM Jamshedpur Chapter gen 2017 Secured 3rd position in Metal Quiz of Technica '17 (the Annual Symposium of Department of Metallurgical and Materials Engineering, NIT Jamshedpur)